Pasandu
Sirisena

This project centers on the development of a custom RISC-V processor architecture implemented on a Gowin Tang Primer 20K FPGA. The system integrates a soft-core processor with a standalone memory controller configured as a memory-mapped peripheral. The hardware logic was designed using Verilog to ensure precise control over instruction execution and data routing. This architecture allows for efficient memory access and instruction fetching tailored to the RISC-V specification. The resulting hardware provides a flexible platform for executing low-level firmware and managing custom digital signal processing workloads.

This hardware system captures and analyzes wireless channel state information to map spatial environments. An ESP32 microcontroller serves as the radio frequency front-end to extract raw Wi-Fi telemetry data. This data is transmitted via a high-speed UART serial connection to a Sipeed Tang Primer 20K FPGA. The FPGA runs custom digital signal processing logic alongside a RISC-V orchestrator to calculate signal power and detect spatial disturbances. The hardware-accelerated pipeline allows for rapid processing of high-bandwidth radio frequency data without overwhelming a standard microcontroller.

This software-defined radio processes frequency-modulated mono and stereo audio streams in real time. The system runs on a Raspberry Pi 4 and utilizes a C++ multithreading architecture with a producer-consumer pipeline to manage high-speed data from radio frequency hardware. Incoming signals undergo block-based decimation and polyphase resampling to step down the sample rates efficiently. The stereo processing path implements a phase-locked loop to synchronize a numerically controlled oscillator with the 19 kilohertz pilot tone. These optimizations allow the hardware to continuously output clear audio while adhering to strict computational constraints.

This Java application functions as an autonomous graph routing engine and real-time simulation. The software converts procedurally generated grid environments into weighted directed acyclic graphs. The system computes the optimal trajectory using multiple search algorithms, including Dijkstra and Bellman-Ford. The environment utilizes a custom objective function where the routing engine must maximize score rewards while minimizing penalty weights. The simulation animates a digital agent navigating the calculated optimal path in real time within a terminal interface.

This hardware design implements an image decompression algorithm directly at the logic gate level to maximize processing throughput. The decompression pipeline is written in Verilog and synthesized for a field-programmable gate array. By utilizing parallel processing blocks, the hardware decodes compressed image frames faster than a sequential software implementation. Memory controllers are used to buffer the incoming compressed bitstream and output the reconstructed pixel data to external display interfaces. This project highlights the performance benefits of translating software algorithms into custom digital logic.

This embedded spatial scanner uses a Time-of-Flight laser rangefinder to construct three-dimensional environmental meshes. The core hardware features an ARM Cortex-M4F microcontroller that drives a stepper motor and interfaces with the sensor using the inter-integrated circuit protocol. The sensor captures radial distance measurements at discrete angular intervals to generate cross-sectional data slices. This data is transmitted over a serial connection to a host computer running a Python application. The host software applies trigonometric transformations to convert the polar data into Cartesian coordinates and renders an interactive point cloud using the Open3D library.

Vital-E is an autonomous robotic platform built around the ESP32 microcontroller to monitor patient health in low-resource clinical settings. The robot relies on a color sensor and line-following logic to navigate hospital corridors and reach patient bedsides. Once in position, the system lowers an articulated arm equipped with a heart rate sensor to capture physiological readings. A proximity sensor ensures the hardware aligns safely with the patient during data collection. The ESP32 then wirelessly transmits the acquired vital signs to a secure web dashboard for continuous monitoring by medical staff.